Japan Rapidus 2nm Wafer Fab Construction Accelerates, Government Invests Heavily in Semiconductor Revival

Japan Semiconductor Industry Revival Plan Accelerates

Japan semiconductor industry revival plan is accelerating. Rapidus, a semiconductor startup established under the leadership of the Japanese government, has made important progress in the construction of its 2nm wafer fab in Chitose, Hokkaido. The Japanese government has committed nearly 1 trillion yen to support the plan.

Rapidus Technology Cooperation and Progress

Rapidus has engaged in deep cooperation with IBM on 2nm chip technology, introducing IBM 2nm GAA technology. At the same time, Rapidus has established a strategic cooperation relationship with IMEC on advanced process R&D. The company plans to start its pilot line in 2025 and achieve 2nm chip mass production in 2027.

Japan Semiconductor Industry Comprehensive Layout

In addition to Rapidus, TSMC fab in Kumamoto has started production operations, and Kioxia and Western Digital continue to expand capacity at their Yokkaichi memory chip plant. The Japanese government provides substantial subsidies through the chip act.